|Via etching in BCB for HBT
H.Stieglauer, T.Wiedenmann, H.Bretz, H.Mietz, D.Traulsen, D.Behammer
United Monolithic Semiconductors – GmbH, Wilhelm-Runge-Strasse 11, D-89081 Ulm, Germany
Phone: +49-731-505-3075, Fax: +49-731-505-3005, E-mail: firstname.lastname@example.org
|Keywords: HBT, BCB via, ICP etching, hard mask, etch
lag, bowing effect
The high integration level associated with HBT- GaAs devices especially ones consisting of analog and digital components typically requires an additional interconnection level in order to achieve a planarization of the transistor mesa topologies. This inter-metallic layer avoids cracks in metals in upper metallization levels at high topography. In this study we developed and characterized the via patterning of BCB (Benzocyclobutan) as an inter metallic layer for GaAs HBT applications. For such an interconnection system a high selectivity to the etch stop layers is required for the high aspect ratio vias. In addition the BCB thicknesses are different due to the planarization. This work shows the capability of via etching with an aspect ratio up to 2 in the BCB interconnection levels using a silicone oxide hard mask. The dry etch is performed in an ICP etcher using fluorine (SF6, CHF3, CF4) and oxygen chemistry. The dry etching consists of three etch steps. At the first step the silicone oxide is etched using a resist mask. Secondly the BCB is structured and at the third step the remaining silicone oxide is removed. After etching no resist removal is necessary and in addition the BCB surface is deoxidised by fluorine plasma.
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